From ALT Linux Wiki
< Ports‎ | riscv64
Jump to navigation Jump to search

OpenOCD (docs) is a tool for debugging, in-system programming and boundary-scan testing for embedded target devices. It is particularly useful for low-level debugging of bootloaders, Linux kernel, etc. with (GDB)

Here are the steps to setup debugging HiFive Unleashed with OpenOCD.

  1. Connect HiFive Unleashed and PC with USB and power it on. This interface provides UART0 (/dev/ttyUSB1) and JTAG interfaces by FTDI FT2232H (link).
  2. Run (see simple config below and do not forget to add user to the plugdev group):
    $ openocd -s <path to the directory with hifive-u.cfg> -f hifive-u.cfg
    OpenOCD will listen port 3333 for GDB connection.
  3. Run GDB compiled with riscv64 target support.
  4. Attach GDB to the OpenOCD:
    gdb$ target extended-remote localhost:3333
  5. Now one could set breakpoints, investigate memory, disassemble memory regions, etc. It is possible to load an ELF file with debug information to import symbols and place breakpoints to symbols.

Example of the simple hifive-u.cfg:

adapter_khz 1000

interface ftdi
ftdi_device_desc "Dual RS232-HS"
ftdi_vid_pid 0x0403 0x6010
ftdi_layout_init 0x0018 0x001b
ftdi_layout_signal nSRST -oe 0x0020
ftdi_layout_signal LED -data 0x0020

set _CHIPNAME riscv
jtag newtap $_CHIPNAME cpu -irlen 5

target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME -rtos hwthread
target create $_TARGETNAME.1 riscv -chain-position $_CHIPNAME.cpu -coreid 1
target create $_TARGETNAME.2 riscv -chain-position $_CHIPNAME.cpu -coreid 2
target create $_TARGETNAME.3 riscv -chain-position $_CHIPNAME.cpu -coreid 3
target create $_TARGETNAME.4 riscv -chain-position $_CHIPNAME.cpu -coreid 4
$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1

flash bank spi0 fespi 0x20000000 0 0 0 $_TARGETNAME.0 0x10040000

if {[ info exists pulse_srst]} {
ftdi_set_signal nSRST 0
ftdi_set_signal nSRST z
sleep 1500
flash protect 0 64 last off
echo "Ready for Remote Connections"