User contributions for IvanMelnikov
31 October 2023
- 14:3714:37, 31 October 2023 diff hist +2 Ports/loongarch64 →LoongArch
- 14:3714:37, 31 October 2023 diff hist +2,028 N Ports/loongarch64 Created page with "{{Stub}} == LoongArch == LoongArch is RISC instruction set architecture (ISA), developed by Loongson Corporation, announced in 2020. Processors implementing this ISA are available since 2021 (Loongson 3A5000 family). == Sisyphus port == Sisyphus was ported to loongarch64 in 2023, and is under heavy development. Currently (2023-10-31), more than 16000 packages (SRPMs), or more than 90% of all packages, are built for the port. The port supports lp64d ABI (new world)...."
27 January 2023
- 09:1509:15, 27 January 2023 diff hist +155 Regular/riscv64 →VNC current
- 08:5908:59, 27 January 2023 diff hist +17 Regular/riscv64 →Feedback
- 08:5808:58, 27 January 2023 diff hist +206 Regular/riscv64 Downloads reworked
18 November 2022
- 12:4112:41, 18 November 2022 diff hist +269 Ports/riscv64 →RISC-V
16 November 2022
- 10:1510:15, 16 November 2022 diff hist +189 Ports/riscv64/QEMU No edit summary current
- 10:0510:05, 16 November 2022 diff hist +93 Ports/riscv64/QEMU No edit summary
29 June 2022
- 13:1113:11, 29 June 2022 diff hist +86 HiFive Unleashed →Setup with alt-rootfs-installer current
- 13:0913:09, 29 June 2022 diff hist −8 Regular/riscv64 →Direct download referenceThese are references to assemblies marked as tested. There are a few more snapshots
6 January 2022
- 08:1308:13, 6 January 2022 diff hist +5 Ports/riscv64 →Repository
- 08:1208:12, 6 January 2022 diff hist +14 Ports/riscv64 →Images
26 December 2021
- 08:1208:12, 26 December 2021 diff hist +10 HiFive Unmatched No edit summary
- 08:0908:09, 26 December 2021 diff hist +19 HiFive Unmatched →Root on NVME
- 08:0808:08, 26 December 2021 diff hist −64 HiFive Unmatched No edit summary
- 07:5107:51, 26 December 2021 diff hist +77 Ports/riscv64 →RISC-V
24 November 2021
- 12:3412:34, 24 November 2021 diff hist +15 Ports/riscv64 No edit summary
- 12:2712:27, 24 November 2021 diff hist −6 Ports/riscv64 No edit summary
- 12:1412:14, 24 November 2021 diff hist −746 Regular/riscv64 No edit summary
- 12:0212:02, 24 November 2021 diff hist +118 Ports/riscv64/QEMU No edit summary