Ports/riscv64: Difference between revisions

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At this page one could find the latest information about ALT port status for the new platform - RISC-V (RV64GC). We're building it on the [https://www.crowdsupply.com/sifive/hifive-unleashed HiFive Unleashed] board from SiFive.
At this page one could find the latest information about ALT port status for the new platform - RISC-V (RV64GC). We're building it on the [https://www.crowdsupply.com/sifive/hifive-unleashed HiFive Unleashed] board from SiFive.
 
If you want to test the ALT port (''QEMU or HiFive Unleashed'') or take part in the development please refer to [https://en.altlinux.org/Regular/riscv64 this page].
== '''Working plan''' ==
== '''Working plan''' ==


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** 4.15
** 4.15
** 4.19-rc2
** 4.19-rc2
** 4.19.6 ([http://ftp.altlinux.org/pub/people/arei/riscv/repo/riscv64/RPMS.hasher/kernel-image-un-def-4.19.6-alt3.riscv64.rpm image RPM], [http://ftp.altlinux.org/pub/people/arei/riscv/repo/riscv64/SRPMS.hasher/kernel-image-un-def-4.19.6-alt3.src.rpm SRPM], [http://git.altlinux.org/people/arei/packages/kernel-image.git?p=kernel-image.git;a=commit;h=a420ee4217797b60b27ce60fd80a39166ddf2143 git])
** 4.19.6 ([http://git.altlinux.org/people/arei/packages/kernel-image.git?p=kernel-image.git;a=commit;h=a420ee4217797b60b27ce60fd80a39166ddf2143 git])
** 5.0.19 ([http://ftp.altlinux.org/pub/distributions/ALTLinux/ports/riscv64/Sisyphus/riscv64/RPMS.classic/kernel-image-un-def-5.0.19-alt2.rv64gc.riscv64.rpm image RPM],[http://ftp.altlinux.org/pub/distributions/ALTLinux/ports/riscv64/Sisyphus/files/SRPMS/kernel-image-un-def-5.0.19-alt2.rv64gc.src.rpm SRPM], [http://git.altlinux.org/people/arei/packages/kernel-image-un-def.git?p=kernel-image-un-def.git;a=summary git])
** (experimetnal) 5.1.9 ([http://ftp.altlinux.org/pub/distributions/ALTLinux/ports/riscv64/Sisyphus/riscv64/RPMS.classic/kernel-experimental-5.1.9-alt1.riscv64.rpm image RPM], [http://ftp.altlinux.org/pub/distributions/ALTLinux/ports/riscv64/Sisyphus/files/SRPMS/kernel-experimental-5.1.9-alt1.src.rpm SRPM], [http://git.altlinux.org/people/arei/packages/kernel-experimental.git?p=kernel-experimental.git;a=summary git])


* BOOT methods:
* BOOT methods:
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*# X11 -- '''DONE'''
*# X11 -- '''DONE'''
*# Desktop Environments -- '''IN PROGRESS'''
*# Desktop Environments -- '''IN PROGRESS'''
* ALT image [http://sisyphus.ru/en/srpm/Sisyphus/mkimage-profiles metaprofile] -- '''IN PROGRESS'''
* ALT image ([http://en.altlinux.org/Regular/riscv64 link]) -- '''DONE'''
* [http://git.altlinux.org/people/arei/packages/girar.git?p=girar.git;a=shortlog;h=refs/heads/riscvmod Girar Builder] -- '''DONE'''
* [http://git.altlinux.org/people/arei/packages/girar.git?p=girar.git;a=shortlog;h=refs/heads/riscvmod Girar Builder] -- '''DONE'''
* QEMU image ([[#QEMU|see below]]) -- '''DONE'''
* QEMU image ([[#QEMU|see below]]) -- '''DONE'''
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The RPM/SRPM repository at [http://ftp.altlinux.org/pub/distributions/ALTLinux/ports/riscv64/Sisyphus/ here].
The RPM/SRPM repository at [http://ftp.altlinux.org/pub/distributions/ALTLinux/ports/riscv64/Sisyphus/ here].


== '''QEMU''' ==
== '''Useful links''' ==
 
You've got to install QEMU with riscv64 support to run ALT RISC-V port on QEMU.
 
In case of the ALT x86_64 host system, for example: [http://sisyphus.ru/en/srpm/Sisyphus/qemu qemu-system-riscv-core].
 
These bits are needed:
* ALT image -- will be soon
* [http://ftp.altlinux.org/pub/people/arei/riscv/repo/riscv64/RPMS.hasher/kernel-image-qemu-un-def-4.19.6-alt3.noarch.rpm kernel for QEMU]
 
After these steps are done it's time to run a kernel!
 
(one possibly needs to change paths to the kernel and rootfs according to a particular system)
<source lang="shell">
qemu-system-riscv64 \
  -nographic -machine virt -kernel /boot/vmlinux-4.19.6-un-def-alt3 \
  -drive file=rootfs.raw,format=raw,id=hd0 -device virtio-blk-device,drive=hd0 \
  -append "earlyprintk root=/dev/vda rootwait fastboot console=ttyS0 debug sunrpc.debug STOP=udev" \
  -netdev user,id=eth0 -device virtio-net-device,netdev=eth0
</source>
 
To log into the shell:
 
Username: root
 
Password: 123
 
== Useful links: ==


* [https://github.com/dalegr/riscv-bbl-utils Berkeley bootloader utils] to merge the linux kernel into the bbl.bin with dummy payload.
* [https://github.com/dalegr/riscv-bbl-utils Berkeley bootloader utils] to merge the linux kernel into the bbl.bin with dummy payload.

Revision as of 11:28, 27 June 2019

RISC-V

RISC-V is an open and free instruction set architecture (ISA). The RISC-V ISA specifications are licensed under a Creative Commons license (CC BY 4.0). Anyone could get the final versions of the user-level ISA specifications and drafts of the compressed and privileged ISA specifications.

Another key feature of the RISC-V architecture that it is scalable and allows multiple implementations. The minimal specification has the commands to store and load, jump and integer arithmetic. It supports the 32-, 64- and 128-bit register sizes: "RV32I, RV64I and RV128I" ("I" stands for integer). This Linux port runs on "RV64IMAFDC" or "RV64GC" ("G" == "IMAFD"):

  • I - Integer and basic instructions
  • M - Multiply and divide
  • A - Atomic operations
  • F - Single precision floating point
  • D - Double precision floating point
  • C - Compressed instructions

At this page one could find the latest information about ALT port status for the new platform - RISC-V (RV64GC). We're building it on the HiFive Unleashed board from SiFive. If you want to test the ALT port (QEMU or HiFive Unleashed) or take part in the development please refer to this page.

Working plan

  • The following Linux kernels have been bare metal tested on SiFive HiFive Unleashed:
  • BOOT methods:
    • Berkeley bootloader -- DONE
    • U-BOOT (link) -- DONE
  • Sisyphus port -- IN PROGRESS
    1. Toolchain -- DONE
    2. Linux Kernel -- DONE
    3. X11 -- DONE
    4. Desktop Environments -- IN PROGRESS
  • ALT image (link) -- DONE
  • Girar Builder -- DONE
  • QEMU image (see below) -- DONE

The RPM/SRPM repository at here.

Useful links

Ports