Ports/riscv64

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Revision as of 20:43, 5 August 2020 by Arei (talk | contribs) (→‎OpenOCD: Update fu540 openocd config)

RISC-V

RISC-V is an open and free instruction set architecture (ISA). The RISC-V ISA specifications are licensed under a Creative Commons license (CC BY 4.0). Anyone could get the final versions of the user-level ISA specifications and drafts of the compressed and privileged ISA specifications.

Another key feature of the RISC-V architecture that it is scalable and allows multiple implementations. The minimal specification has the commands to store and load, jump and integer arithmetic. It supports the 32-, 64- and 128-bit register sizes: "RV32I, RV64I and RV128I" ("I" stands for integer). This Linux port runs on "RV64IMAFDC" or "RV64GC" ("G" == "IMAFD"):

  • I - Integer and basic instructions
  • M - Multiply and divide
  • A - Atomic operations
  • F - Single precision floating point
  • D - Double precision floating point
  • C - Compressed instructions

At this page one could find the latest information about ALT port status for the new platform - RISC-V (RV64GC). We're building it on the HiFive Unleashed board from SiFive. If you want to test the ALT port (QEMU or HiFive Unleashed) or take part in the development please refer to this page.

Working plan

  • The following Linux kernels have been bare metal tested on SiFive HiFive Unleashed:
  • BOOT methods:
    • Berkeley bootloader -- DONE
    • U-BOOT (link) -- DONE
  • Sisyphus port -- IN PROGRESS
    1. Toolchain -- DONE
    2. Linux Kernel -- DONE
    3. X11 -- DONE
    4. Desktop Environments -- IN PROGRESS
  • ALT image (link) -- DONE
  • Girar Builder -- DONE
  • QEMU image (see below) -- DONE

The RPM/SRPM repository at here.

OpenOCD

The OpenOCD (docs) is a tool for debugging, in-system programming and boundary-scan testing for embedded target devices. It is particularly useful for low-level debugging with (GDB) of the bootloader, Linux kernel, etc.

To debug HiFive Unleashed with OpenOCD the following steps are needed:

  1. Connect HiFive Unleashed and PC with USB and power it on. This interface provides UART0 (/dev/ttyUSB1) and JTAG interfaces by FTDI FT2232H (link).
  2. Run (see simple config below and do not forget to add user to the plugdev group): 
    $ openocd -s <path to the directory with hifive-u.cfg> -f hifive-u.cfg
    OpenOCD will listen port 3333 for GDB connection.
  3. Run GDB compiled with riscv64 target support.
  4. Attach GDB to the OpenOCD: 
    gdb$ target extended-remote localhost:3333
  5. Now one could set breakpoints, investigate memory, disassemble memory regions, etc. It is possible to load an ELF file with debug information to import symbols and place breakpoints to symbols.

Example of the simple hifive-u.cfg: 

adapter_khz 1000

interface ftdi
ftdi_device_desc "Dual RS232-HS"
ftdi_vid_pid 0x0403 0x6010
ftdi_layout_init 0x0018 0x001b
ftdi_layout_signal nSRST -oe 0x0020
ftdi_layout_signal LED -data 0x0020

set _CHIPNAME riscv
jtag newtap $_CHIPNAME cpu -irlen 5

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME -rtos hwthread
target create $_TARGETNAME.1 riscv -chain-position $_CHIPNAME.cpu -coreid 1
target create $_TARGETNAME.2 riscv -chain-position $_CHIPNAME.cpu -coreid 2
target create $_TARGETNAME.3 riscv -chain-position $_CHIPNAME.cpu -coreid 3
target create $_TARGETNAME.4 riscv -chain-position $_CHIPNAME.cpu -coreid 4
target smp $_TARGETNAME.0 $_TARGETNAME.1 $_TARGETNAME.2 $_TARGETNAME.3 $_TARGETNAME.4
$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1

flash bank spi0 fespi 0x20000000 0 0 0 $_TARGETNAME.0 0x10040000

init
if {[ info exists pulse_srst]} {
ftdi_set_signal nSRST 0
ftdi_set_signal nSRST z
sleep 1500
}
halt
flash protect 0 64 last off
echo "Ready for Remote Connections"

OpenSBI

QEMU virt

To the QEMU virt machine with one of the images one could proceed through the following steps:

Step 0. Install QEMU with riscv64 system support. For example, in the case of ALT x86_64: qemu-system-riscv-core.

Step 1.a The OpenSBI firmware is placed inside the qcow2/qcow2c image. Let us copy it out of the image. 

root$ qemu-nbd -c /dev/nbd0 qemu-riscv64.qcow2c
root$ mount /dev/nbd0p1 /mnt
root$ cp -v /mnt/usr/share/opensbi/qemu/virt/firmware/fw_payload.elf .
user$ FIRM=./fw_payload.elf

Step 1.b Alternative option: download and install the last version of the OpenSBI for QEMU virt machine. The OpenSBI firmware for QEMU virt will be at /usr/share/opensbi/qemu/virt/firmware/fw_payload.elf

For example: 

user$ curl -O http://ftp.altlinux.org/pub/distributions/ALTLinux/ports/riscv64/Sisyphus/noarch/RPMS.classic/opensbi-firmware-qemu-0.6-alt1.noarch.rpm
root$ rpm -i opensbi-firmware-qemu-0.6-alt1.noarch.rpm
user$ FIRM=/usr/share/opensbi/qemu/virt/firmware/fw_payload.elf

Step 2. Now, it is all set to run the QEMU with a qcow2/qcow2c image, just place the path to the image in QCOW variable: 

$ QCOW=qemu-riscv64.qcow2c
$ qemu-system-riscv64 \
          -nographic -machine virt -kernel "$FIRM" \
          -m 2G -smp cpus=4 \
          -drive file="$QCOW",id=hd0 -device virtio-blk-device,drive=hd0 \
          -netdev user,id=eth0,hostfwd=tcp::5900-:5900 -device virtio-net-device,netdev=eth0

Step 3. For a graphical system, the following system setup is performing through VNC. To connect to the X11 VNC server one should enter the default password alt, it could be changed to another one at the inital setup of the system through GUI.

HiFive Unleashed

To run the SiFive HiFive Unleashed (FU540) SoC with one of the rootfs images one could proceed through the following steps:

Step 0. Through this manual it is assumed that microSD card is at /dev/sdb. Let us create file systems at the microSD: 

root$ sgdisk -g --clear \
        --new=2::+32K    --change-name=2:'fsbl'          --typecode=2:5B193300-FC78-40CD-8002-E86C45580B47 \
        --new=3::+8M:    --change-name=3:'opensbi-uboot' --typecode=3:2E54B353-1271-4842-806F-E436D6AF6985 \
        --new=1::-0      --change-name=1:'root'          --typecode=1:0FC63DAF-8483-4772-8E79-3D69D8477DE4 \
        /dev/sdb
root$ mkfs.ext4 /dev/sdb1
root$ mount /dev/sdb1 /mnt
root$ tar -xpvf hifive-unleashed-riscv64.tar.xz -C /mnt

Step 1.а. The First Stage BootLoader (FSBL) and OpenSBI are placed inside the unpacked /mnt tree. Let us write them to the 2 and 3 partitions respectively, and then unmount /mnt partition. 

root$ dd if=/mnt/usr/share/fu540_boot/fsbl.bin of=/dev/sdb2 bs=1M
root$ dd if=/mnt/usr/share/opensbi/sifive/fu540/firmware/fw_payload.bin of=/dev/sdb3 bs=1M
root$ sync; umount /mnt

Step 1.б. Alternative option: download and install the First Stage BootLoader (FSBL) and OpenSBI for FU540.

For example: 

root$ curl -O http://ftp.altlinux.org/pub/distributions/ALTLinux/ports/riscv64/Sisyphus/noarch/RPMS.classic/fu540-bootloaders-0-alt1.git54bfc90.noarch.rpm
root$ curl -O http://ftp.altlinux.org/pub/distributions/ALTLinux/ports/riscv64/Sisyphus/noarch/RPMS.classic/opensbi-firmware-fu540-0.6-alt1.noarch.rpm
root$ rpm -i fu540-bootloaders-0-alt1.git54bfc90.noarch.rpm
root$ rpm -i opensbi-firmware-fu540-0.6-alt1.noarch.rpm
root$ dd if=/usr/share/fu540_boot/fsbl.bin of=/dev/sdb2 bs=1M
root$ dd if=/usr/share/opensbi/sifive/fu540/firmware/fw_payload.bin of=/dev/sdb3 bs=1M
root$ sync; umount /mnt

Step 3. System at microSD is ready to boot. For a graphical system, the following system setup is performing through VNC. To connect to the X11 VNC server one should enter the default

Useful links

Ports